defining a degree of excellence corporate office bel fuse inc. 198 van vorst street, jersey city, nj 07302-4496 tel: 201-432-0463 fax: 201-432-9542 e-mail: belfuse@belfuse.com internet: http://www.belfuse.com specifications subject to change without notice. far east office bel fuse ltd. 8f/8 luk hop street san po kong kowloon, hong kong tel: 852-2328-5515 fax: 852-2352-3706 european office bel fuse europe ltd. preston technology management centre marsh lane, preston pr1 8ud lancashire, u.k. tel: 44-1772-556601 fax: 44-1772-888366 cat 38 - r0 24 1 tap leading edge control low voltage delay modules transfer molded for better reliability compatible with ttl & dtl circuits terminals: electro-tin plate phosphor bronze performance warranty is limited to specified parameters listed smd - tape & reel available: 24mm wide x 12mm pitch, 750 pieces per 13" reel test conditions @ 25 o c electrical characteristics drive capabilities nh logic 1 fanout - 10 lsttl loads max. nl logic 0 fanout - 10 lsttl loads max. 3.0 volts 3.0 ns (10%-90%) 1.2 x total delay 4 x pulse width 25 ma typical 5.0 volts max. 3.6 0.8 -20 20 -20 0.1 -0.5 1 -1 10 30 70 o 50 units v v v ma ma ma v v v ua ua ma ma c % % min. 3.0 2.4 2.9 0 o 40 100 + (25000/td) ppm/ o c input to output + 2 ns or 5% ,unless otherwise specified delays measured @ 50% levels on leading edge only wth no loads on output rise and fall times measured from 10% to 90% levels tolerances part numbers 300 o c time in minutes for 90 seconds max > 185 o c 225 o c max temp. infra red 0 200 o c 100 o c temp. 8 6 4 2 smd thru-hole recommended temperature profile notes other delays and tolerances available consult sales ein trin pw pp iccl vcc vcc vih vil iik ioh iol voh vol vik iih iil icch iccl ta pw d tc pulse voltage rise time pulse width pulse period supply current supply voltage supply voltage logic 1 input voltage logic 0 input voltage input clamp current logic 1 output current logic 0 output current logic 1 output voltage logic 0 output voltage input clamp voltage logic 1 input current logic 0 input current logic 1 supply current logic 0 supply current operating free air temperature min. input pulse width of total delay maximum duty cycle temp. coeff. of total delay ( td ) s473-0005-06 s473-0007-06 s473-0010-06 s473-0015-06 s473-0020-06 s473-0025-06 s473-0030-06 s473-0035-06 s473-0040-06 s473-0045-06 s473-0050-06 s473-0075-06 s473-0100-06 a473-0005-06 A473-0007-06 a473-0010-06 a473-0015-06 a473-0020-06 a473-0025-06 a473-0030-06 a473-0035-06 a473-0040-06 a473-0045-06 a473-0050-06 a473-0075-06 a473-0100-06 5 ns 7 ns 10 ns 15 ns 20 ns 25 ns 30 ns 35 ns 40 ns 45 ns 50 ns 75 ns 100 ns time delay 3 ns 3 ns 3 ns 3 ns 3 ns 3 ns 3 ns 3 ns 3 ns 3 ns 3 ns 3 ns 3 ns tolerance + 1.0 ns + 1.0 ns + 1.5 ns + 1.5 ns + 1.5 ns + 1.5 ns + 2.0 ns + 2.0 ns + 2.0 ns + 2.0 ns + 2.5 ns + 3.5 ns + 5.0 ns rise time 4 o .030 .015 .004 .012 .008 .285 max .018 .22 max .350 .375 .300 .50 max coplanarity + .002 vcc 8 in 1 gnd 4 * 5 out .285 max .325 .50 max .300 .23 max .20 max .018 .12 min .015 min .045 .012 .008 100 o 90 o bel ( dc ) bel ( dc ) ( p/n ) ( p/n )
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